| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| Inst_edge_detection|Inst_edge_sobel_wrapper|krnl |
75 |
0 |
8 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection|Inst_edge_sobel_wrapper|CacheSystem|ColsCounter |
3 |
0 |
0 |
0 |
9 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection|Inst_edge_sobel_wrapper|CacheSystem|RowsCounter |
3 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection|Inst_edge_sobel_wrapper|CacheSystem|Delayer|RowsCounterComp |
3 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection|Inst_edge_sobel_wrapper|CacheSystem|Delayer |
3 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection|Inst_edge_sobel_wrapper|CacheSystem|DoubleLineBuffer|LineBuffer2 |
11 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection|Inst_edge_sobel_wrapper|CacheSystem|DoubleLineBuffer|LineBuffer1 |
11 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection|Inst_edge_sobel_wrapper|CacheSystem|DoubleLineBuffer |
11 |
0 |
0 |
0 |
24 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection|Inst_edge_sobel_wrapper|CacheSystem |
11 |
0 |
0 |
0 |
74 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection|Inst_edge_sobel_wrapper |
11 |
10 |
0 |
10 |
10 |
10 |
10 |
10 |
0 |
0 |
0 |
0 |
0 |
| Inst_edge_detection |
15 |
0 |
8 |
0 |
48 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_black_white|Inst_binary_divider |
16 |
20 |
0 |
20 |
16 |
20 |
20 |
20 |
0 |
0 |
0 |
0 |
0 |
| Inst_black_white |
15 |
0 |
0 |
0 |
48 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_sdram_rw |
49 |
0 |
20 |
0 |
108 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_sdram_controller |
64 |
3 |
0 |
3 |
56 |
3 |
3 |
3 |
16 |
0 |
0 |
0 |
0 |
| Inst_Address_Generator |
4 |
1 |
0 |
1 |
17 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| Inst_RGB |
13 |
0 |
0 |
0 |
24 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_VGA |
1 |
1 |
0 |
1 |
6 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| Inst_ov7670_capture |
11 |
0 |
0 |
0 |
30 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_ov7670_controller|Inst_ov7670_registers |
3 |
0 |
0 |
0 |
17 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_ov7670_controller|Inst_i2c_sender |
26 |
8 |
0 |
8 |
2 |
8 |
8 |
8 |
1 |
0 |
0 |
0 |
0 |
| Inst_ov7670_controller |
2 |
2 |
0 |
2 |
5 |
2 |
2 |
2 |
1 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_bottom|altsyncram_component|auto_generated|mux3 |
99 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_bottom|altsyncram_component|auto_generated|wren_decode_a |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_bottom|altsyncram_component|auto_generated|rden_decode_b |
3 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_bottom|altsyncram_component|auto_generated|decode2 |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_bottom|altsyncram_component|auto_generated |
47 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_bottom |
47 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_top|altsyncram_component|auto_generated|mux3 |
99 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_top|altsyncram_component|auto_generated|wren_decode_a |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_top|altsyncram_component|auto_generated|rden_decode_b |
3 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_top|altsyncram_component|auto_generated|decode2 |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_top|altsyncram_component|auto_generated |
47 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2|Inst_buffer_top |
47 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_2 |
49 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_bottom|altsyncram_component|auto_generated|mux3 |
99 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_bottom|altsyncram_component|auto_generated|wren_decode_a |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_bottom|altsyncram_component|auto_generated|rden_decode_b |
3 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_bottom|altsyncram_component|auto_generated|decode2 |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_bottom|altsyncram_component|auto_generated |
47 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_bottom |
47 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_top|altsyncram_component|auto_generated|mux3 |
99 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_top|altsyncram_component|auto_generated|wren_decode_a |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_top|altsyncram_component|auto_generated|rden_decode_b |
3 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_top|altsyncram_component|auto_generated|decode2 |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_top|altsyncram_component|auto_generated |
47 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1|Inst_buffer_top |
47 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_frame_buf_1 |
49 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_debounce_reset |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_debounce_resend |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_four_clocks_pll|altpll_component|auto_generated |
3 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| Inst_four_clocks_pll |
2 |
1 |
0 |
1 |
5 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |